Goya Chooses Celestry for Silicon Accuracy, Clock Tree Synthesis
Celestry's ClockWise is Part of Goya's 0.18 Micron and Below Silicon Sign-Off Flow
SAN JOSE, Calif.and HSIN-CHU, Taiwan--(BUSINESS WIRE)--June 10,
2002--Celestry Design Technologies, Inc. (San Jose, Calif.) the
leading provider of Silicon Accurate Sign-off(TM) technology for the
semiconductor and electronics industry, announced today that Goyatek
Technology, Inc. (Goya) (Hsin-Chu, Taiwan), an expert in deep
submicron SoC integration and a member of TSMC'Design Center Alliance,
has selected ClockWise(TM) Celestry'clock tree synthesis product for
its 0.18-micron and below design flow.
Celestry'ClockWise helps customers achieve better silicon
performance in hours rather than weeks with its useful skew and clock
tree synthesis technology. With it, SoC designers can achieve better
performance and faster timing closure when using advanced
semiconductor processes.
According to Tony Peng, Goya vice president, "ClockWise helped us
tapeout multiple designs that can't be handled by other products. The
existing tree optimization feature in ClockWise was superb in
performing both pre-route and post-route skew optimization. In one
design with almost 15,000 leaves, ClockWise optimized the post-route
clock skew from 0.7ns to 0.3ns to achieve our design timing criteria."
"We are very pleased to have ClockWise endorsed by a leading
design service provider, and a part of Goya's advanced place and route
design implementation methodology," remarked Dr. Zhihong Liu,
President and CEO of Celestry.
Celestry's ClockWise provides traditional zero skew as well as
useful skew clock tree synthesis, and is plug-and-play with the
industry's standard place and route tools. With its useful skew
methodology, it improves the timing on critical paths, and helps
designs reach timing closure faster. Additionally, the silicon proven
technology can reduce peak power and noise from simultaneous signal
switching for longer battery life and better circuit reliability.
About Goya
Goya is a premier member of the TSMC Design Center Alliance with
headquarters in Hsin-Chu, Taiwan and design centers in Silicon Valley
and Shanghai, China. Goya provides leading edge design services for
today's advanced SoC design as well as for traditional ASIC turnkey
service.
For more information, visit www.goyatek.com.
About Celestry
Celestry is the leading provider of physical design products that
enable integrated circuit designers to achieve optimal performance
from semiconductor process technologies. The Company offers software
and services to electronic and semiconductor companies involved with
the design of chips that are used in networking, communication,
multimedia and computing products.
Celestry Design Technologies, Inc. is headquartered at 2560
Junction Avenue. San Jose, CA 95134, USA. For more information visit
www.celestry.com, email info@celestry.com or call 408/451-1210.
Notes to Editors:
Acronyms and definitions
SoC: System on a Chip
Celestry, the Celestry logo, ClockWise and Silicon-Accurate
Sign-off are trademarks of Celestry Design Technologies, Inc. All
other trademarks and tradenames are the property of their respective
owners.
Contact:
ValleyPR for Celestry
Georgia Marszalek, 650/345-7477
Georgia@ValleyPR.com
www.celestry.com
